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NOIL1SN3000A
Y_end (b0001001 / d9 and b0001010 / d10)
The Y_end register contains the row address of the last
row to readout. Because a row address is 11-bit wide, the
Y_end address is split over two registers: Y_end<10:8> and
Y_end<7:0>. Y_end<10:8> contains 3 MSBs of the 11-bit
address, and Y_end<7:0> contains 8 LSBs of the address.
Y_end<10:0> must be larger than Y_start<10:0> and not
larger than 1709.
Training (b0001100 / d12)
This register allows switching between different readout
modes. Bits <7:2> are ignored.
? Training_en, bit<0> . In bypass mode, this bit is
evaluated and determines if the training pattern or test
image is transmitted.
? Bypass_mode, bit<1> . This bit allows the sensor to
switch between normal readout of an image and readout
Table 24. Y_END REGISTER
Value
Bit<2:0>
Y_end<7:0> (b0001001 / d9)
Effect
for testing or training purposes.
? Analog_out_en, bit<2> .This bit activates the analog
output of the sensor. The analog value of
column<1696> is brought to the output.
On startup
10101101
Table 26. TRAINING REGISTER
Y_end<10:8> (b0001010 / d10) : Bits<7:3> are ignored
Value
Effect
On startup
00000110
Training_en, bit<0>
X_start (b0001011 / d11)
The X_start register contains the start position for the X
1
0
In bypass mode, the training pattern is
transmitted
In bypass mode, the test image is transmitted
readout. Readout in X starts only at odd kernel positions. As
a result, possible start positions are 64 columns (2 kernels)
separated from each other.
On startup 0
Bypass_mode, bit<1>
Bits <7:5> are ignored.
Table 25. X_START REGISTER
0
1
Normal readout of captured images
Bypass mode readout. The content of register
TRAINING_EN is evaluated.
Value
Bit<4:0>
00000
00001
Effect
X readout starts with the first kernel (column 0)
X readout starts with the third kernel
(column 64)
On startup 0
Analog_out_en, bit<2>
0 Analog output disabled
1 Analog output enabled
11010
X readout starts with the fifty third kernel
(column 1664)
On startup
0
On startup
00000
Black_ref (b0001101 / d13)
This register controls the DAC that sets the dark level for
the ADC. The analog output of the DAC corresponds with
the all zero code of the ADC. The DAC has an 8-bit
resolution and outputs between VAA2V5 and 0 V. This
means that the step size corresponds with about 9.8 mV. The
DAC itself outputs between VAA2V5 and 0 V, but the
buffering circuit that follows after the DAC clips the voltage
close to ground and supply.
Table 27. BLACK_REF REGISTER
Value
Effect
00000000
Output of DAC is VAA2V5
00000001
Output of DAC is VAA2V5–9.8 mV
…
11111111
Output of DAC is 0 V
On startup
01100110
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